Cellular Processing, especially in the 3D realtime case, needs high computing performance. With a special designed coprocessor the requirements can be fulfilled at relatively low cost. First the architectural principles are described which can be used in designing such coprocessors. Second a 3D architecture is presented based on the principles parallel access window, shifting and pipelining. The implementation uses two Field Programmable Logic Arrays thereby performing 66 million of 3D celloperations per second.
Keywords: hardware, architecture
Source:
R. Hoffmann, K.-P. Voelkmann, Hardware Support for 3D Cellular Processing. In V. Malyshkin (ed.),
Parallel Computing Technologies: Proceedings of the 4th International Conference,
Lect. Notes in Comp. Sci., Vol. 1277, Springer, 1997, pp. 322-329
